Lead Asic Design Verification Engineer - Bangalore - Aricent
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Should be in VLSI Domain, Contribute to verification environment development. IP, Block, Subsystem and Top level verification and debug
· Ability to work with teams and juniors and guide them and sub delegate work, if required. · Manage customer expectations and own deliveries as defined in the project schedule · Excellent verbal and written communication skills are required. · Experience on verifying IPs and SoCs leading to first Si success. · Experience in defining IP Coverage matrics using latest industry standard methodologies and HVLs. · Defining verification strategy, writing test plans, developing efficient test benches and test cases. · Experience with Code coverage, Functional coverage and assertion based verification. · ARM based SoC verification experience using C and ARM assembly code. · Proficiency in one scripting language like Perl, C++, Python, Unix Make, Unix Shell Scripts etc. is a great plus · Expertise on atleast 3 of these protocols – AXI, AHB, USB, PCIe, DDR, LPDDR, HDMI, MIPI, ethernet, Bluetooth.
Experience (In Month) : 90