19 May

Technical Leader Analog Layout - Bangalore - Aricent

Position
Technical Leader Analog Layout
Company
Aricent
Location
Bangalore KA
Opening
19 May, 2017 7 days ago

Aricent as the company that open the jobs vacancy, have some qualification and spesification especially for the Technical Leader Analog Layout jobs vacancy. To find out more information and about qualification and spesification details, walkin interview schedule, the address of the company, the company contact info (email/phone number) of Aricent company, please start to apply for the job vacancy with fill the jobs application with click the 'Apply This Job' button below.

VLSI - Analog layout design of block level and chip level from schematics

MandatorySkills:
· Ability to work with teams and juniors and guide them and sub delegate work, if required. · Manage customer expectations and own deliveries as defined in the project schedule · Excellent verbal and written communication skills are required. · Expert on Analog layout design of block level and chip level from schematics. · Hands on experience in Analog Layout design of various designs – SerDes, LVDS, DDR Phy, PLL, Linear and Switching regulators and analog building blocks – amplifiers, comparator, oscillator, voltage and current reference circuits etc. · Good understanding of deep sub-micron and DFM issues and layout techniques · Should have work experience in CMOS process technologies – 22nm, 28nm, 45nm, 65nm etc. · Thorough working knowledge of layout design and physical verification tools - Cadence Virtuoso layout suite, Mentor Calibre, Synopsys Hercules etc.

Experience (In Month) : 90

Qualification: BE


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