19 May

Vlsi Lead Asic Design Verification Engineer - Bangalore - Aricent

Position
Vlsi Lead Asic Design Verification Engineer
Company
Aricent
Location
Bangalore KA
Opening
19 May, 2017 8 days ago

Aricent as the company that open the jobs vacancy, have some qualification and spesification especially for the Vlsi Lead Asic Design Verification Engineer jobs vacancy. To find out more information and about qualification and spesification details, walkin interview schedule, the address of the company, the company contact info (email/phone number) of Aricent company, please start to apply for the job vacancy with fill the jobs application with click the 'Apply This Job' button below.

VLSI - Contribute to verification environment development. IP, Block, Subsystem and Top level verification and debug

MandatorySkills:
· Experience with SV+UVM/OVM/VMM or Specman/eRM/UVMe · Independently contribute to verification environment development. · Prior experience with assertions, functional coverage & code coverage is desired. · Experience with SOC with C/ASM based tests, Graphics or CPU is an added advantage · Experience with AMS and Power aware verification will be a plus · Good understanding of atleast 2 of these protocols – AXI, AHB, USB, PCIe, DDR, LPDDR, HDMI, MIPI, ethernet. · Excellent interpersonal and analytical skills with the ability to work independently.

Experience (In Month) : 90

Qualification: BE


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